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tems
Joined: 26 Nov 2008
Posts: 8
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| General Manchester on a 27q83 |
 Posted: Fri Nov 17, 2023 1:01 pm |
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Was expecting to get the U2RXIF to be set when the stop bits were recognized as per the data sheet for general Manchester.
I'm getting the U2RXIF bit set for every reception of a byte.
Maybe I'm not understanding the u2rxif and stpmd bit operation.
"35.8.1 Delayed Receive Interrupt
When operating in Half Duplex mode, where the microcontroller needs to reverse the transceiver direction after a reception, it may be more convenient to hold off the UxRXIF interrupt until the end of the Stop bits to avoid line contention. The user selects when the UxRXIF interrupt occurs with the STPMD bit. When STPMD is ‘1’, the UxRXIF interrupt occurs at the end of the last Stop bit. When STPMD is ‘0’, the UxRXIF interrupt occurs when the received byte is stored in the receive FIFO. When STP = 10, the store operation is performed in the middle of the second Stop bit, otherwise, it is performed in the middle of the first Stop bit."
I commented out the portion of the get_packet function that checked for the U2RXIF.
How would i detect the stop bits on a general Manchester packet.
Any help would be appreciated
| Code: |
#ZERO_RAM
#define PICtype "18F27Q83"
#include <18F27Q83.h>
#device ADC=10
#FUSES WDT //Watch Dog Timer
#FUSES WDT2048 //Watch Dog Timer uses 1:2048 Postscale
#FUSES NOEXTOSC //External Oscillator not enabled
#Fuses RSTOSC_HFINTRC_64MHZ
//#FUSES RSTOSC_EXT //On Power-up clock running from External Oscillator
#FUSES CKS //Clock Switching Enabled
#FUSES FCMEN //Fail-safe clock monitor enabled
#FUSES PFCMEN //Primary XTAL Fail-safe clock monitor enabled
#FUSES SFCMEN //Secondary XTAL Fail-safe clock monitor enabled
#FUSES MCLR //Master Clear pin enabled
#FUSES NOPUT //No Power Up Timer
#FUSES MVECEN //Vector tables used for interrupts
#FUSES BROWNOUT //Reset when brownout detected
#FUSES BORV28 //Brownout reset at 2.8V
#FUSES ZCDDIS //Zero-cross detect circuit is disabled at POR
#FUSES NOPPS1WAY //Allows reconfiguration of peripheral pins
#FUSES STVREN //Stack full/underflow will cause reset
#FUSES LVP //Low Voltage Programming on B3(PIC16) or B5(PIC18)
#FUSES WDTSW //Watch Dog Timer Postscale settable in software
#FUSES WDTWIN_SW //Watchdog Window is settable in software
#FUSES WDTCLK_SW //WDT clock source settable in software
#FUSES BBSIZ512 //Boot block size 512 bytes
#FUSES CRCBOOTPINC5 //CRC-on-boot output pin is C5
#FUSES CRCBOOTPIN_DRIVEN //CRC-on-bo0t output pin drives high-going and low-going signals (source and sink current)
#FUSES CRCBBSCANERR_STOP //Device will halt execution if CRC error ob boot block
#ZERO_RAM
#device ICD=TRUE
#use delay(internal=32MHz)
//setup the manchester uart
#bit U2STPMD_stop=getenv("BIT:U2STPMD")
#bit U2RXIF_stop=getenv("BIT:U2RXIF")
#bit U2TXBFULL=getenv("BIT:U2TXBF")
#bit UARTON=getenv("BIT:U2ON")
#bit U2TXIF_INT=getenv("BIT:U2TXIF")
#bit U2TXMTIF_empty=getenv("BIT:U2TXMTIF")
#byte UART2CON2=getenv("SFR:U2CON2")
#byte UART2CON0=getenv("SFR:U2CON0")
#byte U2P1L=getenv("SFR:U2P1L")
#define DALI 8
#pin_select U2TX = PIN_C4
#pin_select U2RX = PIN_C5
#use rs232(uart2,stream=manchester,baud=230400,parity=N,xmit=PIN_C4,rcv=PIN_C5,bits=8,errors)
#define Driver_enable PIN_C3
void Send_packet(void);
void Send_data_packet(int8 * ,int16);
void net_putchar( int8 );
int1 get_packet(void);
int8 packet_data[100];
void main()
{
setup_wdt (WDT_OFF);
UARTON=FALSE;
UART2CON0=(UART2CON0 & 0xF0) | DALI;
U2P1L=FALSE;
U2STPMD_stop=1; // set the U2 receive interrupt after stop bit reception
bit_set(UART2CON2,5); // set the number of stop bits to 2
bit_clear(UART2CON2,4);
UARTON=TRUE; //re-enable UART
// lets setup the crc module
setup_crc(16, 12, 5, 0);
if (input(pin_c0)==1) // its a receiver
get_packet();
else // its a transmiiter
send_packet();
}
int1 get_packet() // returns 0 on incorrect CRC
{
int16 i;
int16 rCRC,cCRC;
//! for(i=0;i<=100;i++)
//! {
//! restart_wdt();
//! packet_data[i]=0;
//! }
i=0;
while (1)
{
if (kbhit(manchester)==true )
{
packet_data[i++]=fgetc(manchester); // get the character
}
//! if (U2RXIF_stop==true) //got the stop or end of packet
//! {
//! // need to do crc check here
//! rCRC = make16(packet_data[i-1], packet_data[i]);
//! crc_init(0);
//! cCRC = crc_calc16(&packet_data[0], i-1, 8);
//! if (rCRC == cCRC)
//! return true;
//! else
//! return false; // packet not good
//! }
}
return true;
}
void Send_packet()
{
packet_data[0]=2;
packet_data[1]=0;
packet_data[2]=4;
packet_data[3]=1;
packet_data[4]=134;
send_data_packet(&packet_data[0],5);
}
void Send_data_packet(int8 *ptr,int16 length)
{
unsigned int16 CRC,i;
crc_init(0);
CRC = crc_calc16(ptr,length, 8); // make CRC
output_high(Driver_enable);
for(i=0;i<(length);i++)
{
net_putchar(*(ptr++));
}
net_putchar(make8(CRC, 1));
net_putchar(make8(CRC, 0));
while (U2TXMTIF_empty==false){}; //wait till tx shift is empty
output_low(Driver_enable);
}
void net_putchar( int8 data )
{
while (U2TXIF_INT==false){};
fputc(data,manchester);
}
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Ttelmah
Joined: 11 Mar 2010
Posts: 19539
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| Posted: Sat Nov 18, 2023 2:39 am |
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You are misunderstanding what this does.
Think about the serial byte
startbit Databits....... stopbit
Normally the interrupt is generated at the start of the stop bit, once the
byte has been received. With this setting the interrupt is generated at the
end of the stop bit. However it is still generated for each byte.
The UART knows nothing about Manchester encoding. _You_ have to handle
this. You are handling the packet, and it is your code that has to then flag
that the Manchester stop has been received. |
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tems
Joined: 26 Nov 2008
Posts: 8
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| 27q83 |
| Posted: Sat Nov 18, 2023 7:59 am |
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| Ttelmah thanks for the reply. |
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