PIC18F66K40 SPI2 Communication Problem

[Mrinmoy Dey]

Hi,
I am using PIC18F66K40 in one of my project to communicate with a peripheral ADC module ADS131M04 over SPI.
After setting up initial SPI communication(Here I have used SPI2 port of the controller) from firmware I have reset the device at very start and as per peripheral device's datasheet it should return 0xFF24 as reset confirmation command.

When I am capturing the data in oscilloscope, It looks perfect as per clock and SDI sequence which I have attached below.
[img]https://ibb.co/dKn07Yz[/img]
In the image yellow line is SCL and green line is SDI.

But when I have received data in register the 24-bit or 3bytes received as
byte 1 = 01111111
byte 2 = 10010010
byte 3 = 00000000
Though the peripheral device command length is 16-bit but its default spi word length is 24-bit; so last byte is padding byte.

Here the problem is MSB of the 1st byte is zero and then each byte shifted by 1bit right but this is not reflected in oscilloscope.

I can't figure out any probable reason of it. I am using CCS version 5.083.
If anyone having any idea about that will be helpful.

[PCM programmer]

Post your SPI setup line.

[Ttelmah]

Yes.
Being one bit shifted, suggests you are using the wrong SPI mode.
Mode 1 I think is needed for this chip, so SPI_L_TO_H in the setup.

However I have to say, why make things complex for yourself?.
Just use #USE_SPI, select mode1, and bits=24. Let the compiler do
the work for you. Work with int32 values.

However, you could also set the WLENGTH parameter to give 32bits
and do everything with 32bit transfers.

What it replies with will depend on what you are sending in out_data.
You do understand, that the reply, is in the frame _following_ the command.
So you actually need to send the command as one operation, then
clock a second frame for the reply.
The first byte back, when a new command is sent, is the response to
the last command sent.
I'd honestly configure the chip to 16bit mode. Otherwise you are wasting
space and time. Each 'frame' is normally six words long. So working
with 16bit word length, twelve bytes. With 24bit word length, eighteen
bytes.

[Mrinmoy Dey]

My spi2 setup code is -

[Ttelmah]

OK.
So use '#use SPI', and 24bit mode.
A lot simpler.
Your setup is wrong. That selects mode0. You need:

setup_spi2(SPI_MASTER | SPI_CLK_DIV_16 | SPI_L_TO_H);

Do you really want to clock that slow?.

[Ttelmah]

A couple of comments.
You do realise that running at 3.3v (which you need to be to talk to this
ADC), you would be slightly better to use the LF chip, rather than the F.
Draws a little less power, and has lower voltages for things like RAM
data retention.
It is just slightly better optimised for operation at the lower voltage.

Are you using the SYNC/RESET pin?. Otherwise you have to do the
repeat read sequence to clear the FIFO when starting a transfer.

[Mrinmoy Dey]

@Ttelmah
According to your recommended spi setup function the communication is happening perfectly right now and without any bit shift. Thank you very much.

Now other points on the same topic -
1. Initially I am using lower clock speed for testing. Once all set I will enhance it. Although for this case controller side clock freq is 20MHz.

2. Yes, we are using SYNC/RESET pin. so synchronization will be proper and clearing FIFO will be easier.

Thank you once again.