spi_transfer() question - SOLVED

[newguy]

Normally I'd simply cut code & test on hardware, but my PCB isn't due to arrive for a few days. I'd like to get this code done and move on.

I've never used the relatively new #use spi() implementation; in the past I've always used the old spi_write() and spi_read() functions. On a high level I get how spi_transfer() works but I'm just looking for some clarification.

Compiler version 5.108.

The compiler's EX_SPI.c and the 9356.c driver it employs calls spi_transfer(). In the read_ext_eeprom() function, there is an unsigned int8 array called Data with a size of 3 bytes.

Data is initialized as:
Data[0] = 0x0c;
Data[1] = address; // the address which must be read
Data[2] = 0;

spi_transfer is then called as
spi_transfer(STREAM_SPI_9356, Data, Data, 3);

The function then returns (Data[2]).

I guess I'm going to ask a couple of things. spi_transfer() is "intelligent" enough to start placing the data it reads back starting at offset 2 in the array. Does anyone know if this is related to the data in the array being non-zero? How does it know that only 8 bits are being written for the address and not 2 or 3? Or is this just bad practice and no one should assume that spi_transfer() is intelligent enough to permit the use of the same array for both the written and read data?

Second question. If I'm dealing with an eeprom that is expecting an 8 bit opcode followed by a 16 bit address, would the following be the correct way to read the byte which is stored at that 16 bit address?

[Ttelmah]

You need to look at the data sheet, showing how the bytes are positioned
in the 'packet'. It should show a diagram, with the clocks versus what is
sent/received on each.
If it does expect a 32clock transfer, with the incoming data bits ignored
for the last eight clocks, and it generating an output byte on it's SDO
for those eight clocks, then 'yes'.

[newguy]

Confirmed. If you call spi_transfer() in the manner shown in the manual - with two arrays, write[] & read[], read[] will be populated with the expected response beginning at an offset which corresponds to 1 higher than the total bytes written to SPI.

Example: SPI eeprom which expects a 1 byte opcode followed by a 2 byte address. To read 3 bytes from the thing:

write[0] = opcode
write[1] = MSB address
write[2] = LSB address
write[3] = 0
write[4] = 0
write[5] = 0

read[0] = ignore
read[1] = ignore
read[2] = ignore
read[3] = byte 1, retrieved from (address)
read[4] = byte 2, retrieved from (address + 1)
read[5] = byte 3, retrieved from (address + 2)